Issuer: C-DAC India (Ministry of Electronics and Information Technology)
Description: Completed an intensive 5-day bootcamp focused on Unmanned Aerial Systems (UAS) and drone technology. Gained foundational knowledge in UAV operations, modern applications, and regulatory frameworks governing aerial technologies.
Issuer: C-DAC Pune
Description: Completed comprehensive training in Artificial Intelligence, Machine Learning, and Deep Learning. Acquired practical expertise in data pipelines, feature engineering, model training behaviors, loss functions, hyperparameters, regularization, Deep Neural Network (DNN) architectures, and the fundamentals of Transformer models.
CGPA : 8.90/10 (till sem 5)
CGPA : 8.5/10 (till sem 5)
Issuer: MeitY, IIT Madras, C-DAC India, Maker Village, and ChipIN Centre
Description: Ranked among the Top 100 teams nationwide in the Chips to Start-up Grand Challenge. Developed a startup initiative leveraging India’s homegrown RISC-V processor families—specifically SHAKTI (IIT Madras) and VEGA (C-DAC). Designed robust digital architectures and successfully presented technical implementations to expert panels from the C2S and SHAKTI engineering teams.
Issuer: Swayam NPTEL (IIT Madras)
Description: Developed proficiency in data manipulation, visualization, and foundational Machine Learning workflows. Gained hands-on experience utilizing Pandas for data cleaning and Scikit-learn for implementing data-driven decision-making and predictive models.
Issuer: Swayam NPTEL (IIT Roorkee)
Description: Awarded the Elite badge for advanced proficiency in CMOS logic design. Mastered critical VLSI concepts including transistor sizing, circuit characteristics, power analysis, technology scaling, and multi-level SPICE modeling. Developed a strong practical understanding of power-performance-area (PPA) trade-offs in modern digital circuit design.
Issuer: Swayam NPTEL(IIT Guwahati)
Description: Mastered High-Level Synthesis (HLS) design flows, gaining the ability to translate C/C++ algorithms into efficient, real-world RTL for FPGA and SoC implementations. Acquired expertise in preprocessing, scheduling, allocation, datapath generation, and controller synthesis. Applied graph theory and data structure algorithms to optimize hardware architectures utilizing loop pipelining and unrolling.
Issuer: CoreEL Technologies Pvt.Ltd. and AMD-Xilinx
Description: Explored the integration of AI engines, ARM Cortex processing systems, programmable logic (CLBs), and DSP slices within the Versal ACAP platform. Studied the deployment of AI/ML models using TensorFlow and PyTorch for edge computing applications, focusing on low-latency processing and real-time AI capabilities for industrial and automotive (ADAS) systems.
Issuer: STMicroelectronics AI Ecosystem
Description: Completed a 5-day practical training program focused on integrating Artificial Intelligence into embedded IoT systems. Utilized STM32 microcontrollers and NanoEdge AI Studio to develop a machine learning model capable of real-time audio anomaly recognition (e.g., detecting ambulance sirens). Demonstrated the real-world application of edge AI for critical healthcare and emergency response scenarios.